A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike a logic gate which has a fixed function, a PLD has an undefined function at the time of manufacture. The PLD is programmed, or configured, with a specific function before it is used in an electronic circuit.
The arrangement and operation of components within the PLD are programmed by architecture configuration bits. The architecture configuration bits are set prior to normal operation of the PLD. The bits are set using an operation called “programming” or “configuration.” The configuration bits can be stored in volatile memory (i.e., SRAM), non-volatile memory (i.e., EEPROM/flash) or received from either a serial or parallel external data stream. When the configuration bits are stored in volatile memory, the configuration bits need to be loaded from a non-volatile memory, a micro controller, or some other source.
There are two types of registers in a programmable logic system: configuration registers (or other memory element) and application registers. The configuration registers are set to map digital functions into the programmable logic (for example to determine the logic equations for the function). After the configuration of the programmable logic system is complete, the function may start operation. In certain arrangements, the configuration bits for the PLD are generated off-chip by a user with a configuration tool. At the time of configuration, the configuration bits are loaded into the system from the external configuration tool and stored configuration memory cells (e.g., a configuration register). Such a configuration process determines the time required to program the PLD, since the configuration process must be implemented every time the PLD is either turned on or configured. The configuration process is “write-only” from the user's perspective and the configuration data must be in a specific format to program the device due to the fact that this data is programmed in a fixed (normally serial) sequence internally. In addition, the entire chip system implementing the PLD must be stopped and re-booted to accept the new configuration data. In this configuration process, the entire chip functionality must be reprogrammed in this sequence, even if only a small or modular change is desired. Once the device is configured, the digital logic functions can be operational. In many cases, these logic functions have application registers. The application registers are registers that the user interacts with to control the function and to pass data to and from the function. The interface to these registers, that is the method to write and read these application registers, is also created out of the programmable resources and therefore is included in the configuration described previously.